This invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of manufacturing a semiconducoor device which features an improvement in the step of fabricating a p-type conductive layer (an impurity layer).
The conventional impurity-diffusing processes performed during the manufacture of a semiconductor apparatus comprise the ion implantation method and the solid phase diffusion method, which makes use of thermal diffusion of impurity from an impurity-containing material into a substrate. The former process comprises, as is shown in FIG. 3A, the step of directly implanting ions in the surface of silicon substrate 31, and later thermally diffusing the introduced ions. This process offers the advantage in that it ensures accurate electrical control of the quantity of impurities to be absorbed in the substrate surface. The latter process comprises, as is shown in FIG. 3B, the step of depositing an impurity-containing glass layer 32 on silicon substrate 31, and later thermally diffusing the impurity contained in glass layer 32 into silicon substrate 31. Though having the merit of providing a relatively thin impurity-containing layer, use of the latter process is as yet not as widespread throughout the industry as the ion implantation method.
Since semiconductor elements are becoming more and more miniaturized, they require an increasingly thinner impurity layer contained in a silicon substrate. However, the aforementioned processes of ion implantation and solid phase diffusion are accompanied by the following drawbacks.
In the case of the ion implantation process, the diffusion layer cannot be formed sufficiently thin beyond a predetermined extent, on account of the so-called channeling effect, even if an implantation is made by applying as low an acceleration voltage as possible. The channeling effect becomes more prominent in boron than in n-type phosphorus or arsenic, and as a result, greatly hindering the formation of a p-type impurity layer. Moreover, ion-implanted impurities which have to be thermally activated unavoidably tend to be more diffused than is the case immediately after ion implantation, thereby resulting in greater difficulties in the quest to provide a satisfactorily thin diffusion layer.
A further drawback accompanying the ion implantation process is that difficulties arise when attempting to deposit a uniform diffusion layer over an inclined plane. In recent years, the technique of digging a groove in a silicon substrate and providing a capacitor, through using the inner walls of the grooves, has been proposed, with the aim of resolving the problem of a decrease in the capacity of an MOS capacitor, which can arise from the miniaturization of an element. As has been explained above, however, it is extremely difficult to effect the uniform introduction of an impurity into the side wall of the aforementioned groove.
When it is attempted to perform solid phase diffusion, a problem arises in that the diffusion coefficient of both boron and arsenic (generally employed as an impurity in this process) in glass is less than 1% of that in a silicon substrate. In other words, in the solid phase diffusion process, the slow rate of impurity diffusion in the glass defines the rate of diffusion in a silicon substrate. Therefore, in order to increase the rate of introduction of an impurity into the silicon substrate, the diffusion process must be carried out at a temperature higher than 1000.degree. C. As a result, the impurity will be unavoidably diffused through the silicon substrate, thereby rendering impossible the formation of a sufficiently thin junction.